SIL Verification for Safety Relays: A Rigorous Technical Guide for Functional Safety Engineers
Engineering Guide
SIL Verification for Safety Relays: A Rigorous Technical Guide for Functional Safety Engineers
What Is This Calculation—and Why It Matters
SIL (Safety Integrity Level) verification is the quantitative demonstration that a safety instrumented function (SIF)—such as a safety relay logic solver—meets its target risk reduction requirement, as defined by IEC 61508 and IEC 62061. For electromechanical or solid-state safety relays used in machinery or process safety applications, this verification centers on calculating two core metrics: the Average Probability of Failure on Demand (PFDavg) and the Diagnostic Coverage (DC).
Unlike generic reliability analysis, SIL verification is safety-critical: it directly determines whether a safety function can credibly reduce risk to an ALARP (As Low As Reasonably Practicable) level. A safety relay failing undetected during a hazardous event—e.g., a press brake not stopping when a light curtain is breached—can result in catastrophic injury or equipment loss. PFDavg quantifies that latent risk; DC reveals how effectively the relay’s internal diagnostics (e.g., coil monitoring, contact supervision, cross-wiring checks) catch dangerous faults before demand occurs. Without rigorous verification, certification bodies (e.g., TÜV, exida) will reject SIF validation, halting commissioning and exposing operators to regulatory noncompliance (e.g., under EU Machinery Directive 2006/42/EC or OSHA 1910.119).
This calculation is not optional engineering overhead—it is a mandatory deliverable in the safety lifecycle (IEC 61508-1, Clause 3.2.17), required during the realization and operation phases to close the loop between design intent and field performance.
Theory and Formula Walkthrough
The SIL Verification Calculator implements two interdependent equations derived from IEC 61508-6 Annex B and IEC 62061 Annex D. These models assume periodic proof testing with staggered intervals—a realistic representation of maintenance schedules where tests may be aligned with production cycles or shutdown windows.
1. Average Probability of Failure on Demand (PFDavg)
For a safety relay with multiple proof test intervals (t₁, t₂, t₃, t₄), the PFDavg is computed using a time-weighted average over the full test cycle (T = t₄), accounting for both undetected and detected dangerous failures:
$$ \text{PFD}{\text{avg}} = \frac{1}{T} \left[ \int_0^{t_1} \lambda{du} \cdot t , dt + \int_{t_1}^{t_2} \lambda_{du} \cdot (t - t_1) , dt + \int_{t_2}^{t_3} \lambda_{du} \cdot (t - t_2) , dt + \int_{t_3}^{t_4} \lambda_{du} \cdot (t - t_3) , dt + \sum_{i=1}^{4} \lambda_{dd} \cdot \frac{(t_i)^2}{2} \right] $$
Simplifying yields the closed-form expression implemented in the calculator:
$$ \text{PFD}{\text{avg}} = \frac{\lambda{du}}{2} \cdot \frac{t_1^2 + (t_2 - t_1)^2 + (t_3 - t_2)^2 + (t_4 - t_3)^2}{t_4}
- \frac{\lambda_{dd}}{2} \cdot \frac{t_1^2 + t_2^2 + t_3^2 + t_4^2}{t_4} $$
Variable Interpretation:
λ_du(Dangerous Undetected Failure Rate, units: /hour): Failures that compromise safety and evade detection by diagnostics or proof tests (e.g., welded contacts in a normally open safety channel). This dominates PFDavg and must be sourced from certified failure databases (e.g., exida FMEDA, OREDA) or manufacturer data with documented confidence bounds (IEC 61508-2, Table A.4).λ_dd(Dangerous Detected Failure Rate, /hour): Dangerous failures detected by diagnostics (e.g., self-test identifying coil open-circuit) and repaired before demand. While less harmful, they contribute to spurious trips and maintenance burden.t₁,t₂,t₃,t₄: Cumulative proof test intervals (hours). These define the test schedule, not necessarily equal periods. Real-world constraints (e.g., annual shutdowns at t₁ = 8,760 h, biannual at t₂ = 17,520 h) necessitate this staggered model. The final intervalt₄sets the overall test cycle duration T.
⚠️ Critical Note: Safe failure rates (
λ_su,λ_sd) do not appear in PFDavg—they impact availability and nuisance trips but not safety integrity. Their inclusion in inputs supports DC calculation and system-level availability modeling.
2. Diagnostic Coverage (DC)
DC measures the effectiveness of automatic diagnostics in detecting dangerous failures:
$$ \text{DC} = \frac{\lambda_{dd}}{\lambda_{dd} + \lambda_{du}} \times 100% $$
Variable Interpretation:
λ_ddandλ_duare as defined above. DC is dimensionless and expressed as a percentage.- IEC 61508-2 (Table A.6) and IEC 62061 (Table D.1) assign DC categories: Low (0–60%), Medium (60–90%), High (90–99%). A typical dual-channel safety relay with cross-monitoring achieves DC ≥ 90%—a prerequisite for SIL 3 per IEC 62061 Clause 5.3.2.
Standard Requirements: Citations and Compliance
SIL verification must align with normative clauses—not just informative annexes:
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IEC 61508-2:2010, Clause 7.4.4.2: "The PFDavg shall be calculated using a method consistent with the assumptions of the safety life cycle… [and] shall take into account systematic capability, hardware fault tolerance, and diagnostic coverage." The calculator’s use of λdu/λdd and explicit DC derivation satisfies this.
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IEC 61508-2:2010, Table A.2: Defines maximum allowable PFDavg per SIL: SIL 1 (10−2–10−1), SIL 2 (10−3–10−2), SIL 3 (10−4–10−3). A PFDavg of 2.1 × 10−4 meets SIL 3 only if all other requirements (e.g., HFT ≥ 1, systematic capability SC2) are fulfilled.
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IEC 62061:2021, Clause 5.3.2: "The diagnostic coverage shall be determined by analysis… considering the type of diagnostics, their coverage, and the probability of failure modes." The calculator’s DC output must be justified by FMEDA evidence—not assumed.
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IEC 62061:2021, Annex D.2.2: Explicitly permits multi-interval proof testing models for systems with non-uniform maintenance schedules, validating the
t₁–t₄input structure.
Failure to cite these clauses—or to trace calculations to them—invalidates audit trails during third-party certification.
Common Mistakes and How to Avoid Them
1. Using Generic Failure Rates Without Traceability
Mistake: Substituting textbook λ values (e.g., “10−6/h for relays”) without referencing a specific FMEDA report tied to the exact relay model, firmware version, and operating environment. Fix: Always use manufacturer-provided FMEDA data (e.g., Pilz PNOZmulti, Siemens Sirius 3SK1) with documented confidence levels (IEC 61508-2, Annex F). Apply environmental derating factors (e.g., +50% λ for high-vibration zones per IEC 61508-2, Table A.7).
2. Misinterpreting Proof Test Intervals
Mistake: Setting t₁ = 8760, t₂ = 8760, t₃ = 8760, t₄ = 8760 (implying four annual tests), then misreading t₄ as the cycle length. This incorrectly assumes tests occur at 0, 8760, 17520, 26280, and 35040 hours—yet calculates PFDavg over only 8760 h.
Fix: t₄ is the total cycle duration. If tests occur annually, set t₁ = 8760, t₂ = 17520, t₃ = 26280, t₄ = 35040. The denominator in PFDavg is always t₄.
3. Ignoring Safe Failure Contributions to DC
Mistake: Assuming λ_su and λ_sd influence DC. They do not—the numerator and denominator in DC contain only dangerous failure rates.
Fix: Use λ_su/λ_sd solely for availability calculations (e.g., MTBF) or to validate that safe failures don’t mask dangerous ones (a systematic error per IEC 61508-2, Clause 7.4.2.3).
4. Overlooking Diagnostic Coverage Validation
Mistake: Reporting DC = 95% without evidence that diagnostics detect all dangerous failure modes (e.g., tracking contact wear, insulation degradation, or common-cause failures). Fix: Require FMEDA showing DC ≥ 90% for each dangerous failure mode (e.g., “welded NO contact: DC = 98% via contact resistance monitoring”). Cross-check against IEC 62061 Table D.1 test coverage requirements.
5. Neglecting Uncertainty Propagation
Mistake: Reporting PFDavg = 1.82 × 10−4 without stating uncertainty (e.g., ±35% at 90% confidence). Fix: Perform Monte Carlo analysis on λ inputs using beta distributions (IEC 61508-2, Annex F) and document confidence bounds. SIL claims require PFDavghigh ≤ SIL target.
Worked Example with Realistic Numbers
Scenario: A Pilz PNOZ X1 safety relay (dual-channel, category 4, DC = 95%) protects a robotic cell. FMEDA data (certified by TÜV Rheinland, Report #PNOZ-X1-FMEDA-2023) provides:
λ_du= 3.2 × 10−6 /hλ_dd= 1.4 × 10−5 /hλ_su= 8.1 × 10−6 /hλ_sd= 2.7 × 10−5 /h
Proof testing is scheduled at:
t₁= 8,760 h (1 year)t₂= 17,520 h (2 years)t₃= 26,280 h (3 years)t₄= 35,040 h (4 years)
Step 1: Calculate DC
$$
\text{DC} = \frac{1.4 \times 10^{-5}}{1.4 \times 10^{-5} + 3.2 \times 10^{-6}} \times 100% = \frac{1.4 \times 10^{-5}}{1.72 \times 10^{-5}} \times 100% = 81.4%
$$
→ DC = 81.4% (Medium coverage; acceptable for SIL 2, insufficient for SIL 3 without HFT enhancement).
Step 2: Calculate PFDavg
First compute interval squares:
t₁²= (8,760)² = 7.674 × 107(t₂ − t₁)²= (8,760)² = 7.674 × 107(t₃ − t₂)²= (8,760)² = 7.674 × 107(t₄ − t₃)²= (8,760)² = 7.674 × 107- Sum of squared intervals = 4 × 7.674 × 107 = 3.070 × 108
- Sum of
tᵢ²= 7.674×10⁷ + 3.070×10⁸ + 6.927×10⁸ + 1.228×10⁹ = 2.215 × 10⁹
Now apply formula:
$$
\text{PFD}_{\text{avg}} =
\frac{3.2 \times 10^{-6}}{2} \cdot \frac{3.070 \times 10^8}{35,040}
- \frac{1.4 \times 10^{-5}}{2} \cdot \frac{2.215 \times 10^9}{35,040} $$ $$ = (1.6 \times 10^{-6}) \cdot (8,760) + (7.0 \times 10^{-6}) \cdot (63,220) = 0.0140 + 0.4425 = 0.4565 \times 10^{-3} = \mathbf{4.57 \times 10^{-4}} $$
Result: PFDavg = 4.57 × 10−4, DC = 81.4%.
SIL Assessment:
- PFDavg falls within SIL 2 range (10−3–10−2) but exceeds SIL 3 upper bound (10−3).
- DC = 81.4% is Medium—insufficient for SIL 3 (requires High DC ≥ 90% per IEC 62061 Table D.1).
→ Conclusion: The SIF achieves SIL 2. To reach SIL 3, either improve DC (e.g., add external contact monitoring) or reduce λdu (e.g., select a relay with higher inherent reliability).
Final Recommendations
- Trace every input: Log FMEDA report IDs, environmental derating factors, and test schedule rationale.
- Validate DC empirically: Conduct diagnostic coverage validation tests per IEC 61508-6, Annex C.
- Re-run quarterly: Update λ values with field failure data (e.g., via MOC procedures).
- Document uncertainty: Report PFDavg with 90% confidence bounds—not just point estimates.
- Integrate with PHA: Feed PFDavg results back into Layer of Protection Analysis (LOPA) to verify risk reduction targets.
SIL verification is not a one-time math exercise—it is the quantitative heartbeat of functional safety. When performed rigorously, it transforms a safety relay from a component into a provably trustworthy guardian of human life.
📜 Applicable Standards
💬 Frequently Asked Questions
PFDavg (Average Probability of Failure on Demand) applies to low-demand mode safety functions (typically ≤1 demand per year), as defined in IEC 61508 Part 4 and IEC 62061. It quantifies the average likelihood the relay fails when required to act. PFH (Probability of Dangerous Failure per Hour) is used for continuous or high-demand mode systems (>1 demand/year) and reflects the hourly failure rate. For safety relays—commonly deployed in emergency stop or interlock applications operating in low-demand mode—PFDavg is the correct metric. Using PFH incorrectly can overstate risk or misassign SIL. The SIL Verification Calculator outputs PFDavg because it assumes demand-driven operation, consistent with IEC 61508 Table 3 and Annex B guidance for electromechanical logic solvers.
Proof test intervals directly impact PFDavg: longer intervals increase accumulated dangerous undetected failures (λ_du), raising PFDavg and potentially downgrading SIL. In the calculator, t1–t4 represent staggered test times (e.g., annual, biennial, etc.), enabling modeling of non-uniform testing strategies—critical for real-world maintenance plans. IEC 61508-6 recommends proof test intervals ≤ 2× the design life of weakest component, and requires documented justification for intervals >1 year. The calculator uses the average time-to-failure approximation for λ_du × t/2 (for constant failure rate), but accuracy improves when t1–t4 reflect actual scheduled maintenance windows—not theoretical maxima. Always validate intervals against relay manufacturer’s certified test procedures and diagnostic coverage claims.
λ_du (dangerous undetected) and λ_dd (dangerous detected) are essential because only λ_du contributes directly to PFDavg; λ_dd enables timely mitigation via diagnostics, reducing effective risk. Their ratio defines Diagnostic Coverage (DC = λ_dd / (λ_dd + λ_du)), a key SIL enabler. Reliable values must come from FMEDA (Failure Modes Effects and Diagnostic Analysis) reports per IEC 61508-2 Annex D—or certified third-party databases like exida or TÜV. Never use generic ‘industry averages’; relay-specific data varies by architecture (e.g., dual-channel vs. monitored single-channel), contact material, and environmental stress. Manufacturer datasheets often list λ_du/λ_dd at 25°C; derate for temperature, vibration, or switching cycles using IEC 61709 or MIL-HDBK-217F if FMEDA isn’t available.
No—the current SIL Verification Calculator assumes a single-channel, non-redundant logic solver (i.e., 1oo1 architecture). A 1oo2 configuration requires fault-tolerant modeling: PFDavg depends on common cause failure (β-factor), proof test coverage of both channels, and whether diagnostics detect failures before demand. IEC 61508-6 Annex F provides equations for 1oo2, but they involve additional inputs (e.g., β, channel independence, test effectiveness) not captured here. For redundancy, use dedicated tools supporting architecture-specific models—or perform manual calculation per IEC 61508 Tables 5–7, validated by a competent functional safety engineer. Always confirm relay certification scope: many ‘SIL 3’ relays achieve that rating only in specific architectures with full diagnostic coverage and strict proof testing.
Diagnostic Coverage (DC) directly limits the maximum verifiable SIL: per IEC 61508 Table 3, SIL 2 requires ≥60% DC, SIL 3 requires ≥90% DC for low-complexity devices like relays. DC < 60% caps verification at SIL 1—even with low λ_du. The calculator computes DC from λ_dd and λ_du inputs, but real-world DC depends on hardware diagnostics (e.g., cross-monitoring, forced-guided contacts) and software self-tests. Note: DC must be achieved and verified—not just claimed. TÜV or exida certification reports must demonstrate DC under worst-case conditions (e.g., contact welding, coil degradation). If your relay’s certified DC is 95%, but field wiring faults aren’t covered, effective DC drops—requiring conservative assumptions or architectural changes (e.g., adding separate monitoring).
The calculator assumes 100% proof test coverage for dangerous detected failures (λ_dd) and partial—but not perfect—coverage for dangerous undetected failures (λ_du). Specifically, it models proof tests as ideal for λ_dd (immediate removal) and as restoring the system to ‘as-good-as-new’ condition for λ_du only if the test detects the fault. This aligns with IEC 61508-6’s ‘effective proof test’ definition. To verify actual coverage: review the relay’s certified test procedure (e.g., ISO 13849-2 Annex K), confirm test methods detect all failure modes (e.g., contact welding via force testing), and audit field execution (e.g., torque verification, contact resistance measurement). Coverage < 100% increases effective λ_du—requiring adjustment of t1–t4 or inclusion of a coverage factor (K_test) per IEC TR 61508-7.
The calculator implements core PFDavg equations from IEC 61508-6 Annex B (Equation B.1 for simple systems) and aligns with IEC 62061’s PFDavg methodology for low-demand safety functions. However, it does not replace full compliance activities: IEC 61508 requires documented safety lifecycle execution (clauses 7–12), including hazard analysis, specification, validation testing, and management of change. For machinery applications, ISO 13849-1 uses PL (Performance Level), not SIL—requiring separate calculation of MTTFd, DC, and CCFL. While PFDavg results may inform PL assessment, direct mapping isn’t permitted. Always supplement calculator output with a full Safety Requirements Specification (SRS), verification report signed by a competent person, and evidence of systematic capability (IEC 61508-2 Clause 7) before commissioning.
PFDavg is linearly proportional to λ_du, making it highly sensitive: ±50% error in λ_du yields ±50% error in PFDavg—potentially shifting SIL assignment (e.g., SIL 2 → SIL 1). IEC 61508-2 Annex D mandates uncertainty analysis; for relays, typical FMEDA uncertainty is ±30% (90% confidence) due to limited field data. Acceptable practice: use λ_du values with documented confidence bounds, apply Monte Carlo simulation if possible, and ensure calculated PFDavg stays ≤ 50% of the target SIL’s PFD limit (e.g., ≤ 2.5×10⁻³ for SIL 2) to absorb uncertainty. Never use unverified vendor ‘typical’ values—require traceable FMEDA reports with failure mode breakdowns and environmental derating applied.
📈 Case Studies
Offshore Platform Fire & Gas System SIL Verification
Case Study 1: Offshore Platform Fire & Gas System SIL Verification
Scenario
A major North Sea operator upgraded its legacy fire and gas (F&G) detection system on a manned production platform. The new system comprises redundant transmitters, a safety PLC with dual-channel voting logic, and HART-enabled diagnostics. Regulatory requirements mandated SIL 2 compliance per IEC 61511 for the shutdown function triggered by hydrocarbon gas detection. Key constraints included: limited access for maintenance (only quarterly during weather windows), harsh marine environment (salt-laden air, vibration), and no opportunity for online diagnostics beyond built-in self-tests.
Given Data
lambda_du= 8.2 × 10⁻⁶ failures/hour (based on FMEDA of SIL-rated pressure transmitters and solenoid valves)lambda_dd= 4.1 × 10⁻⁶ failures/hour (diagnosable faults from self-test routines)lambda_su= 1.5 × 10⁻⁵ failures/hour (safe undetected — e.g., transmitter drift below alarm threshold)lambda_sd= 3.0 × 10⁻⁶ failures/hour (safe detected — e.g., open-circuit fault flagged in HART diagnostics)t1= 8760 h (1 year — first proof test after commissioning)t2= 17520 h (2 years — second proof test)t3= 26280 h (3 years — third proof test)t4= 35040 h (4 years — fourth proof test; aligns with planned platform turnaround schedule)
Calculation
The SIL Verification Calculator computes PFDavg using the time-dependent average probability of failure on demand over the full test interval sequence (up to t₄ = 4 years). For a multi-interval proof test schedule, the tool applies the standard IEC 61508-6 formula adapted for staggered intervals:
PFDavg ≈ (1 / T) × Σᵢ₌₁⁴ [∫tᵢ₋₁tᵢ λDU × t + (λDD × t² / 2τ) ] dt, where τ is the effective diagnostic interval (here assumed 8760 h, as diagnostics run continuously but only validated at proof test). However, the calculator internally uses the industry-standard approximation for non-uniform test intervals:
PFDavg = (λDU × T / 2) + (λDD × T / 2) × (1 − DC),
where Diagnostic Coverage (DC) = λDD / (λDU + λDD) = 4.1e−6 / (8.2e−6 + 4.1e−6) = 0.333 → 33.33%.
Using the tool’s validated numerical integration across t₁–t₄ (accounting for increasing unrevealed DU accumulation between tests), the output is:
pfd_avg= 0.003214 (i.e., 3.214 × 10⁻³)diagnostic_coverage= 33.33%
Result and Decision
PFDavg = 0.003214 falls within the SIL 2 range (0.01 to 0.001). The system meets SIL 2 requirements only because the proof test interval was shortened to annual (t₁ = 8760 h) — sensitivity analysis showed that extending t₁ to 2 years increased PFDavg to 0.0061 (>0.005 upper bound for SIL 2). Consequently, the operator mandated annual proof testing (including loop checks, sensor calibration, and valve stroke tests) and upgraded diagnostics firmware to increase λDD by 40%, raising DC to 45% in the next revision.
Lesson
Proof test frequency dominates PFDavg more than component failure rates in low-DC systems — always validate test logistics early in design, not just component specs.
Pharmaceutical Sterile Isolator Door Interlock SIL Assessment
Case Study 2: Pharmaceutical Sterile Isolator Door Interlock SIL Assessment
Scenario
A GMP-compliant biologics manufacturing facility in Singapore deployed a Class A isolator for aseptic filling. The safety function prevents door opening when internal pressure differential is unsafe (<10 Pa), avoiding contamination risk. The interlock uses two independent pressure sensors, a SIL 2-certified safety relay, and mechanical door locks. Constraints included: strict validation protocols (FDA/EMA), zero tolerance for false trips (costly batch loss), and inability to perform intrusive proof tests during active campaigns — only possible during 72-hr cleaning windows every 14 days.
Given Data
lambda_du= 2.4 × 10⁻⁷ failures/hour (high-reliability MEMS pressure sensors with redundancy)lambda_dd= 9.6 × 10⁻⁷ failures/hour (diagnosed via cross-channel comparison and watchdog timers)lambda_su= 5.0 × 10⁻⁷ failures/hourlambda_sd= 1.2 × 10⁻⁶ failures/hourt1= 336 h (14 days × 24 h — first proof test window)t2= 672 h (28 days — second window)t3= 1008 h (42 days — third window)t4= 1344 h (56 days — fourth window; aligned with quarterly preventive maintenance)
Calculation
Diagnostic Coverage is calculated as: DC = λDD / (λDU + λDD) = 9.6e−7 / (2.4e−7 + 9.6e−7) = 0.80 → 80.00%.
The SIL Verification Calculator integrates failure accumulation across short, frequent intervals. With high DC and tight test scheduling, PFDavg is dominated by residual undetected failures between tests. Using exact numerical integration over four 336-h intervals (t₁=336, t₂=672, t₃=1008, t₄=1344), the tool yields:
pfd_avg= 0.0000427 (4.27 × 10⁻⁵)diagnostic_coverage= 80.00%
Result and Decision
PFDavg = 4.27 × 10⁻⁵ comfortably satisfies SIL 3 (PFDavg ≤ 0.001, target range 0.001–0.0001). The design was certified SIL 3, enabling use in critical containment applications per ISO 14644-7. Notably, the high DC (80%) and aggressive 14-day proof test cycle reduced PFDavg by 87% compared to annual testing — validating the investment in redundant sensing and real-time diagnostics. No hardware changes were needed; only procedural updates to enforce strict adherence to the 14-day test window.
Lesson
In high-integrity, low-failure-rate systems, diagnostic coverage and disciplined test discipline synergize to achieve higher SIL — but only if procedures are embedded in operational SOPs, not just engineering specs.